Decimal Arithmetic Evaluation Framework

Decimal Arithmetic Software hardware co-design Evaluation Framework

List of Current Project Regarding Decimal Computing:


Number  Name of Repository Version Control Last Update
1 Rocket chip with decimal accelerator on Github  Github 2019/07/11
2 Co-design using IBM decNumber C library 64-bit Github  2020/02/17
3 Co-design using IBM decNumber C library 128 bit Github  2020/02/17







Other  important Downloads (Verilog):

17 Digit CLA
34 Digit CLA
128-bit PPA
64-bit PPA
1X-5X generator
1X-5X generator


List of Publication


Title (Paper) Author Year, Publisher
Decimal Multiplication Using Combination of Software and Hardware Riaz-ul-haque Mian , Michihiro Shintani , and Michiko Inoue 2018, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
Cycle-Accurate Evaluation of Software-Hardware Co-Design of Decimal Computation in RISC-V Ecosystem Riaz-ul-haque Mian , Michihiro Shintani , and Michiko Inoue 2019, 32nd IEEE International SYSTEM-ON-CHIP Conference (SoCC)


Multiplication Verification Decimal Floating-Point Multiplication Example DPD-Encoding
RoCC Acceleratro Interface Framework Manual DPD-Encoding Multiplication Verification
DPD-Encoding DPD-Encoding


This website provides an opensource framework for accuraely evaluate software-hardware co-design based decimal arithmetic. It uses opensource content, source code, and database. IBM decNumber C libary, RISC-V ecosystem, decimal arithmetic verification test case, etc. are an example of such opensource content. The site has been compiled with the utmost care. Nevertheless, we give no guarantee that the information provided is current, accurate, complete or error-free. We accept no liability for damage or loss arising directly or indirectly from the use of this website, provided it has not been caused intentionally or by gross negligence.
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